The CDCM7005 provides high precision and stable frequency, making it ideal for signal chain devices such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital upconverters (DUCs), and digital downconverters (DDCs). The device also features industry-lowest phase noise of -219 dBc/Hz (PLL quality factor), 162 fs for LVPECL, and minimum phase jitter performance of 232 fs for LVCMOS, and a maximum output offset of 20 ps. This superior performance not only undersamples data converters such as ADCs at higher input frequencies, but also provides the highest signal-to-noise ratio.
The CDCM7005 has features that maximize design flexibility, including Serial Peripheral Interface (SPI) logic for programming and independent support control. The device synchronizes the voltage controlled crystal oscillator (VCXO) frequency up to 2.2 GHz (LVPECL) with either of the two reference clocks to provide a clean, high frequency clock output. These outputs can be divided by a ratio of 1, 2, 3, 4, 6, 8, or 16 and provide output selection at the LVCMOS and LVPECL levels.
The solution also has other very useful features, including a device bias voltage (VBB) pin that provides the correct voltage for a single-ended VCXO, eliminating the need for external resistors and significantly simplifying the product design process. . In addition, the CDCM7005 supports frequency hold mode and fast frequency lock for auto-protection and higher system redundancy.
Texas Instruments Introduces High-Performance Clock Synthesizer and Jitter Cleaner>
Texas Instruments (TI) today announced a clock synthesizer and jitter cleaner with the industry's lowest phase noise and jitter. The solution offers higher performance and better design flexibility to meet the increasing demands of customers in this area, such as 2.5G/3G wireless base stations, data communications, medical imaging and measurement testing. (For more information, please visit: )